Renesas Electronics and ASTC collaborate to develop software for smart cameras with R-Car V3M virtual platform
Renesas Electronics Corporation (TSE:6723), a leading global semiconductor solutions provider, announced that it has jointly developed VLAB/ for Renesas R-Car V3M with Australian Semiconductor Technology Co., Ltd. (ASTC) and its subsidiary VLAB Works. IMP-TA Simulator Virtual Platform (VP), a system-on-a-chip (SoC) for advanced driver assistance systems (ADAS) and in-vehicle infotainment systems. VP can simulate image recognition and cognitive IP in the R-Car V3M chip system, and embedded software development can be performed only with PC, which shortens VP development time and improves software quality. The VLAB/IMP-TA simulator is one of the latest software development tools for Renesas Electronics for R-Car V3M and is part of the Renesas autonomyTM platform released in April 2017.
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Jean-Francois Chouteau, Vice President, Renesas Electronics Global ADAS Center, said: "Our goal is to provide a comprehensive, unified and easy-to-use software development environment for all automotive system developers using R-Car SoC. ASTC's VLAB technology is accelerating The cornerstone of the ADAS software development of the Renesas autonomy platform."
"We have a long-term relationship with Renesas Electronics and are pleased to work with the Renesas autonomy platform to further accelerate ADAS software development and autonomous driving R&D. We apply VLAB technology," said Ji Zehong, vice president of KK, a semiconductor technology company in Australia. R-Car V3M architecture, functionality and timing modeling enable R-Car V3M customers to bring new ADAS applications to market with superior quality and reliability.
In ADAS and autopilot systems, computing vehicle position through algorithm development (including target detection and recognition) has become more complicated and cumbersome, and algorithm development with PC has become the standard. However, it is very difficult to port PC-developed algorithms to embedded software that is deeply dependent on the hardware architecture. Therefore, it is necessary to have a development environment that can smoothly transition or integrate the algorithm development phase with the embedded software development phase.
To meet this demand, Renesas Electronics and ASTC jointly developed the VLAB/IMP-TA simulator VP, which enables embedded software development for R-Car V3M using only PC. ASTC's core technology, VLAB, simulates target hardware on a PC, allowing system developers to develop embedded software using only PCs without the need for physical hardware. In this way, system developers can check and control hardware in the virtual environment displayed on the PC. In addition, VP can effectively detect defects in the development software. By using the VLAB/IMP-TA simulator, system developers can develop high-quality software in less than half the time.
Main features of the VLAB/IMP-TA simulator
æ高 Improve development efficiency by reproducing R-Car V3M's IMP-X5 image recognition engine on a PC
The new VP reproduces the IMP-X5's built-in 64-threaded MIMD processor on the PC, enabling debugging such as step-by-step execution, interrupts, and variable reference for multithreaded programming written in C. Using this virtual environment can significantly reduce software development time.
Ÿ ASTC's timing simulation technology accurately estimates hardware processing time
The new VP features a timing simulator that accurately models and reflects hardware key timing and effectively emulates the IMP-X5 by modeling the complex timing behavior of the cache, bus, processor, and other major components. This allows system developers to estimate hardware processing time at least 100 times faster than the currently used periodic reference simulator.
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