Design of a Novel Synchronous Digital Electronic Clock System Based on Power Carrier Communication
In recent years, with the power line carrier communication (Power Line Communication, PLC) technology, power line carrier communication have been widely used in daily life and industrial production, such as power line, power line carrier automatic meter reading systems, home automation systems, industrial Process control, etc.
Power line carrier communication technology refers to a communication method that uses power lines to transmit data and media signals. The technology is to load information carrying high frequency modulation into a current, and then use power to transmit and receive information, and then the high frequency modulation information is The current is separated and transmitted to a computer or other appropriate device for information transfer. Since power line carrier communication technology uses power lines as transmission channels, has high transmission reliability, low line attenuation, and infrastructure investment and daily maintenance costs that do not require communication line construction, this technology becomes convenient, Low cost and easy to implement.
This paper introduces a synchronous digital electronic clock system based on low voltage power carrier communication technology. Traditional clock synchronization usually requires manual calibration to each clock. This work is not only inefficient, but also human error, unable to meet the needs of modern management. The use of a synchronous clock based on power carrier communication is not only low in cost, but also satisfactorily solves the above problems. The system utilizes a low-voltage power supply circuit, and the host sends a clock calibration signal, which is transmitted by the carrier communication module through the power line. After the slave receives the signal, the time is adjusted to realize the synchronous operation of the electronic clock.
1 overall system structure
　 1.1 System components
The system consists of two parts, one is the control terminal of the synchronous clock, as the host system, and the other part is the slave system. All slaves have the same structure, and the number of units is determined according to actual needs and is not limited. The system uses a 220V low-voltage power supply line as a communication medium. The master and slave systems are mainly composed of single chip microcomputer, PCF8563 time chip, SC1128 spread spectrum carrier chip, output power amplifier, band pass filter, preamplifier circuit, coupling circuit, keyboard array input, display output and so on. The host system microcontroller uses Atmel's AT89S52 as the control chip, and adds RS 232 or USB serial interface to communicate with the PC. The PC can synchronize with the Internet time through the network, so that the system can synchronize with the Internet time. The slave MCU uses AT89C2051 as the control chip. The slave sets a running mode switch, which can work in synchronous mode or independent mode. If it works in synchronous mode: the clock calibration signal is sent by the host, and the carrier communication module transmits the power through the power line. After receiving the signal, the slave adjusts the time to realize the synchronous operation of the electronic clock. If working in an independent mode: read the time from the clock chip PCF8563. Users can enter time or modify time via the keyboard.
The clock chip is designed by Philips. The PCF8563 is a low-power CMOS real-time clock/calendar chip that provides a programmable clock output, an interrupt output and a brownout detector. All addresses and data are routed through the I2C bus interface. Line pass.
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